The inventive concepts described herein are generally related to a read operation method of a memory device, and more particularly to a read operation method of a NAND flash memory device.
Semiconductor memory devices may be classified into volatile memory devices and non-volatile memory devices, according to whether stored data is lost when power supply to the memory device is discontinued. Flash memory devices are a type of non-volatile memory devices, and may be classified into NAND flash memory devices in which cell transistors are arranged in series between a bit line and ground and NOR flash memory devices in which the cell transistors are arranged in parallel between the bit line and ground.
The read operation of the NAND flash memory device is performed by units of pages. Data, that is a program or erase state of each memory cell connected to a selected word line of a selected block, is determined by a page buffer circuit detecting a bit line voltage.
The memory cell may be classified into an on-cell (or erased cell) and an off-cell (or programmed cell) according to whether the memory cell is programmed or not. The off-cell has a high threshold voltage as electrons are injected into a floating gate of the cell transistor. The on-cell refers to a memory cell having a low threshold voltage as it remains in an erase state.
According to the read operation of a conventional flash memory device, in the initial stand-by state or idle state before the read operation is performed, the bit line is discharged to a ground voltage VSS. When the read operation starts as a read command and an address command are input, the address of a cell to be read, or a selected cell, is set up and only a bit line, or a selected bit line, to which the selected cell is connected is precharged to a power voltage VDD by the input of an address corresponding to the set-up address.
After the selected bit line is precharged, the selected bit line is developed according to whether the selected cell is an on-cell or an off-cell. After the selected bit line is developed, a change of a voltage of the selected bit line is detected and amplified. The amplifier outputs an amplified data. After the read operation is completed, the selected bit line is discharged back to the ground voltage VSS through a recovery operation so that all bit lines may be in a discharged state. Accordingly, the memory device is returned to the stand-by state or idle state. The read operation of the flash memory device may be performed by repeating the above-described series of steps.
However, in the read operation of the conventional flash memory device, since the above-described precharge, discharge, develop, sensing, and recovery operations need to be repeated for each selected cell, the speed of the read operation may be reduced. Also, due to the repetition of the above read operation, a read disturb characteristic of the flash memory may be deteriorated.